1. Field of the Invention
This invention relates to data processing systems. More particularly, this invention relates to accessing data corresponding to a target memory address in a data processing system.
2. Description of the Prior Art
It is known to control memory access in data processing systems using memory management logic such as memory protection units and memory management units. Memory protection units are similar to memory management units, but are simple since they do not involve mapping of virtual to physical addresses. In known systems when address generation logic outputs the target memory address of data to be accessed that target memory address is resolved by the management logic to determine whether or not the application program that generated the target memory address is permitted to access the associated memory region and to identify which one of a plurality of physical memories (e.g. cache, tightly coupled memory or main memory) is storing the data to be accessed. Since it takes time for the memory management logic to resolve the target memory address, it typically takes several processing cycles before data corresponding to the target memory address can be located as being stored in a particular one of the plurality of memories and thus be accessed. Accordingly, the data access time can become a time critical path that limits the performance of the data processing system.
There is a requirement for data processing devices that are more compact and more efficient in order to meet the demands of current processing applications and evolving electronic devices. Accordingly, there is a requirement to improve the efficiency of data access to improve the performance of the data processing apparatus and to reduce the circuit area of the logic used to perform data accesses in these devices.